Sr. Principal EDA Software Engineer (C++) – Characterization
Cadence Design Systems
About the role
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Join our expert R&D team as we create technologies and products that enable static and dynamic transistor-level analysis of the most advanced custom digital and mixed-signal circuits, powering the communication, IoT, and AI markets.
Key Responsibilities
Enhance and expand existing tools' architecture to cover timing analysis.
Create new frameworks for analyzing effects dominant at n5 and below.
Leverage machine learning technology to achieve significant improvements in speed, capacity, and usability over existing solutions.
Must-Have Qualifications
5+ years of experience in development of EDA tools and expertise in one or more areas: transistor-level timing, power, noise, aging, reliability, and EMIR analysis.
Hardcore C++ knowledge, particularly in a Linux environment.
Strong proficiency in designing data structures, algorithms, and applying software engineering principles.
Industry experience developing and maintaining C++ based applications on Unix or Linux platforms.
Requirements
Experience with quality and software processes.
Proficiency in designing data structures, algorithms, and software engineering principles.
Ability to analyze transistor or gate-level schematics.
BS degree in Computer Science, Electrical Engineering, or Computer Engineering preferred.
Nice-to-Have Skills
Experience in development of circuit simulation or library characterization programs.
Understanding of SPICE simulation transistor models at a high level.
Experience with distributed programming, database design, and cloud APIs for distributed computing.
Why Cadence?
At Cadence, you’ll work alongside industry leaders and innovators who are passionate about advancing technology. Your contributions will directly impact the development of cutting-edge tools and solutions for the communication, IoT, and AI industries. We foster a collaborative environment where your expertise and ideas will shape the technology of tomorrow.
Apply Today
If you are ready to make a difference and push the boundaries of EDA technology, we encourage you to apply and join Cadence’s world-class R&D team.
The annual salary range for California is $119,000 to $221,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.
We’re doing work that matters. Help us solve what others can’t.
Responsibilities
- Enhance existing tool architecture to support timing analysis.
- Develop frameworks to analyze effects dominant at n5 and below.
- Apply machine learning to improve tool speed, capacity, and usability.
Qualifications
- 5+ years developing EDA tools, with expertise in transistor-level timing, power, noise, aging, reliability, or EMIR analysis.
- Strong C++ knowledge and experience developing applications on Unix or Linux.
- Proficiency in data structures, algorithms, and software engineering principles.
- Ability to analyze transistor- or gate-level schematics.
- Experience with quality and software processes.
- BS in Computer Science, Electrical Engineering, or Computer Engineering preferred.
- Circuit simulation or library characterization experience is a plus.
- Knowledge of SPICE transistor models, distributed programming, database design, or cloud APIs is a plus.
Benefits
- Paid vacation and holidays
- 401(k) plan with employer match
- Employee stock purchase plan
- Medical, dental, and vision plan options
- Potential bonus and equity compensation
Skills mentioned
About Cadence Design Systems
Cadence is a market leader in AI and digital twins, pioneering the application of computational software to accelerate innovation in the engineering design of silicon to systems. Our design solutions, based on Cadence’s Intelligent System Design™ strategy, are essential for the world’s leading semiconductor and systems companies to build their next-generation products from chips to full electromechanical systems that serve a wide range of markets, including hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics. In 2024, Cadence was recognized by the Wall Street Journal as one of the world’s top 100 best-managed companies. Cadence solutions offer limitless opportunities—learn more at www.cadence.com.
H-1B sponsorship history
Historical employer filing data was found for Cadence Design Systems. The employer record includes 1,739 historical certified applications. This is employer-level history, not a guarantee that this role currently offers sponsorship.