Senior Staff Software Engineer, Embedded Systems, Firmware

About the role

MINIMUM QUALIFICATIONS:

• Bachelor's degree or equivalent practical experience.
• 8 years of experience in software development.

• 7 years of experience working with embedded operating systems.

• 5 years of experience with design and architecture; and testing/launching

software products.

• Experience with C or C++.

PREFERRED QUALIFICATIONS:

• Master’s degree or PhD in Engineering, Computer Science, or a related

technical field.

• 8 years of experience with data structures and algorithms.
• 5 years of experience in a technical leadership role leading project teams

and setting technical direction.

• 3 years of experience working in a complex, matrixed organization involving

cross-functional, or cross-business projects.

ABOUT THE JOB:

Google's software engineers develop the next-generation technologies that change

how billions of users connect, explore, and interact with information and one

another. Our products need to handle information at massive scale, and extend

well beyond web search. We're looking for engineers who bring fresh ideas from

all areas, including information retrieval, distributed computing, large-scale

system design, networking and data storage, security, artificial intelligence,

natural language processing, UI design and mobile; the list goes on and is

growing every day. As a software engineer, you will work on a specific project

critical to Google’s needs with opportunities to switch teams and projects as

you and our fast-paced business grow and evolve. We need our engineers to be

versatile, display leadership qualities and be enthusiastic to take on new

problems across the full-stack as we continue to push technology forward.

With your technical expertise you will manage project priorities, deadlines, and

deliverables. You will design, develop, test, deploy, maintain, and enhance

software solutions.

As an ASIC-Software Firmware Architect, you will guide Google’s TPU firmware

design across multiple chip generations. You will drive architecture for

Security, Power Management, and Telemetry across microcontrollers in an embedded

distributed system with real-time constraints and direct hardware interaction.

Bridging hardware and software, you will collaborate with silicon teams to

co-engineer TPU capabilities and upper-layer software teams to build interfaces.

You will ensure platform reliability, addressing system-level challenges through

rigorous engineering.

Working with end-users, you will help shape the developer experience for ML

practitioners. Google’s end-to-end integration from chip to data center offers a

unique opportunity to impact the entire TPU system.

Google Cloud accelerates every organization’s ability to digitally transform its

business and industry. We deliver enterprise-grade solutions that leverage

Google’s cutting-edge technology, and tools that help developers build more

sustainably. Customers in more than 200 countries and territories turn to Google

Cloud as their trusted partner to enable growth and solve their most critical

business problems.Individual pay is determined by factors including job-related

skills, experience, and relevant education or training.

US: $262000 - $364000 (USD) + 25% bonus target + equity + benefits

Learn more about benefits at Google

[https://www.google.com/about/careers/applications/benefits/].

RESPONSIBILITIES:

• Drive the long-term technical goal and architecture for Google’s

next-generation TPU firmware, solving complex system-level issues across

Security, Power Management, and Telemetry.

• Act as a technical multiplier and domain expert, mentoring executive

engineers and fostering a culture of engineering, high reliability, and

innovation across distributed ASIC-Software teams.

• Forge partnerships across organizational boundaries, bridging silicon design,

software infrastructure, and data center deployment teams to co-engineer

end-to-end TPU capabilities.

• Define and execute multi-year technical roadmaps for multi-generational chip

programs, guiding complex firmware initiatives from initial silicon concept

through to global data center deployment.

• Architect highly reliable, real-time on-chip systems and bare-metal

microcontroller solutions that maximize AI accelerator performance and

optimize the developer experience for platforms like Trillium and Ironwood.